Senior Analog Layout Engineer
- Site: San Jose
Aptina Imaging is a division of Micron Technology. Aptina, the industry leader in CMOS image sensors, has an immediate opening for Senior/Lead Analog Layout Engineer position in San Jose.
In this position, you will be the lead layout engineer performing analog/mixed-signal layout design for low-noise high-speed CMOS image sensor analog core. You will be leading top level floorplanning and power/ signal routing, and implementing compact analog blocks such as amplifiers, voltage and current references, column, row and readout circuitry. You will be utilizing your layout skills for noise, coupling, shielding, power and symmetry, and you will be closely working with design engineering team on a day-to-day basis in solving physical design issues.
Successful candidate for this position will have:
- At least 5+ years experience in analog/mixed-signal IC layout design.
- Familiarity with industry standard CAD tools.
- Ability to independently identify, debug and solve physical verification discrepancies (DRC/LVS).
- Ability to create p-cell or write skill code (preferred).
- Strong analytical, organizational, and communication skills and be a team player.
Education:
BSEE
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